June 20, 2017
In this dissertation, several primary obstacles in 3-D ICs are considered across a wide range of abstraction levels, spanning from devices to design methodologies. Carbon-based materials, i.e., graphite and carbon nanotubes (CNTs), are exploited as interconnect material to alleviate thermal congestion within 3-D structures. Electrical and thermal models are presented for the interface between the CNT through substrate vias (TSVs), and horizontal graphite interconnect.
TSVs enable the 3-D platform; however, these TSVs also pose additional concerns. TSV-to-substrate and TSV-to-TSV noise coupling is evaluated within heterogeneous 3-D ICs. Models and circuit techniques are proposed to identify and mitigate substrate coupling issues. A hexagonal TSV bundle pattern is proposed to reduce area per TSV, capacitive coupling, and effective inductance as compared to the classical mesh bundle pattern. The shielding effectiveness of the hexagonal bundle is also discussed.
To further increase the effectiveness of TSVs, a layer ordering approach to reduce the total number of TSVs within 3-D ICs is proposed. By applying layer ordering to 3-D systems, similar functionality is achieved with fewer TSVs. This technique reduces the total area occupied by the TSVs and substrate noise coupling due to unnecessary vertical interconnections.
Finally, to exploit the full potential of the 3-D platform, it is matched with a compatible application. A hybrid harvesting system within a 3-D structure is proposed for internet of things devices. The proposed harvesting system focuses on the four energy types available within the ambient environment: electromagnetic, solar, thermal, and kinetic. Each harvester can be placed on a separate layer within the 3-D structure using a preferential and compatible substrate material. The efficiency of the 3-D based hybrid harvesting system is also discussed.