June 15, 2014
New devices, such as Hewlett Packard's TiO2 memristors and STT-MRAM (Spin Torque Transfer Magnetoresistive RAM), open opportunities for a wide range of new circuits in the fields of memory, logic, analog, and neuromorphic electronic systems. Memristor-based memories are nonvolatile with good scalability and without leakage current. Therefore, they may overcome many disadvantages of current memory technologies.
In this research, we develop and implement memristor-based applications at the circuit and architecture levels. We developed a novel device model - TEAM (Threshold Adaptive Memristor). The TEAM model is general (i.e., fits many different memristive technologies), simple (i.e., requires low computational effort), and sufficiently accurate. The TEAM model is implemented in VerilogA to be used in SPICE simulations.
We designed several logic circuits with memristors and developed design methodologies for them. IMPLY (material implication), MAGIC (Memristor Ratioed Logic), and Akers logic arrays are logic families that can be performed within memristive memories, enabling in-memory computing. MRL (Memristor Ratioed Logic) is a different logic family used for hybrid CMOS-memristor logic gates to increase the logic density.
We designed a novel memory structure – the multistate register (MPR) and embedded it within CPU pipelines. The integration of MPR within processors enables new microarchitectures, such as Continuous Flow Multithreading (CFMT). CFMT is a multithreaded processor that is as simple as Switch on Event Multithreading (SoE MT) with high performance and low power. We designed CFMT and implemented it with an FPGA, presenting a performance improvement of 40% on average with an energy reduction of 6.5%, as compared to SoE MT.