Patents

Eby G. Friedman

Distinguished Professor of Electrical and Computer Engineering
Department of Electrical and Computer Engineering
University of Rochester
Rochester, New York 14627
USA

United States and International Patents
  1. M. Kazemi, E. Ipek, and E. Friedman, " Switching of Perpendicularly Magnetized Nanomegnets with Spin-Orbit Torques in the Absence of External Magnetic Fields," United States Patent, No. 11,626,229 B2, April 11, 2023.

  2. A. G. Qoutb and E. G. Friedman, " Switching of Perpendicularly Magnetized Nanomagnets with Spin-Orbit Torques in the Absence of External Magnetic Fields," United State Patent, No. 11,594,357 B2, February 28, 2023.

  3. M. Kazemi, E. Ipek, and E. Friedman, " Switching of Perpendicularly Magnetized Nanomegnets with Spin-Orbit Torques in the Absence of External Magnetic Fields," South Korea Patent No. 2479452, December 20, 2022.

  4. A. Ciprut and E. G. Friedman, " Energy Efficient Write Scheme for Non-Volatile Resistive Crossbar Arrays with Selectors," South Korea Patent No. 10-2449620, September 27, 2022.

  5. A. G. Qoutb and E. G. Friedman, " Distributed Spintronic/CMOS Sensor Network for Thermal Aware Systems," United State Patent, No. 11,378,466 B2, July 5, 2022.

  6. A. Ciprut and E. G. Friedman, " Energy Efficient Write Scheme for Non-Volatile Resistive Crossbar Arrays with Selectors," United States Patent, No. 11,189,344 B2, November 30, 2021.

  7. M. Kazemi, E. Ipek, and E. Friedman, " Switching of Perpendicularly Magnetized Nanomegnets with Spin-Orbit Torques in the Absence of External Magnetic Fields," United States Patent, No. 11,004,588 B2, May 11, 2021.

  8. M. Kazemi, E. Ipek, and E. Friedman, " Switching of Perpendicularly Magnetized Nanomegnets with Spin-Orbit Torques in the Absence of External Magnetic Fields," Japan Patent Office, Patent No. 6777364, October 12, 2020.

  9. M. Kazemi, E. Ipek, and E. Friedman, " Switching of Perpendicularly Magnetized Nanomegnets with Spin-Orbit Torques in the Absence of External Magnetic Fields," China Patent, No. ZL 201680026484.4, August 28, 2020.

  10. E. Ipek, B. Feinberg, S. Wang, M. N. Bojnordi, R. Patel, and E. G. Friedman, " Superconducting System Architecture for High-Performance Energy-Efficient Cryogenic Computing," United States Patent, No. 10,552,756 B2, February 4, 2020.

  11. M. Kazemi, E. Ipek, and E. Friedman, " Switching of Perpendicularly Magnetized Nanomegnets with Spin-Orbit Torques in the Absence of External Magnetic Fields," United States Patent, No. 10,510,474 B2, December 17, 2019.

  12. E. Friedman, I. Richter, X. Guo, M. Kazemi, K. Pas, R. Patel, E Ipek, and J. Liu, " Resistive Memory Accelerator," United States Patent, No. 10,297,315, May 21, 2019.

  13. E. Friedman, I. Richter, X. Guo, M. Kazemi, K. Pas, R. Patel, E Ipek, and J. Liu, " Resistive Memory Accelerator," United States Patent, No. 10,261,977, April 16, 2019.

  14. E. Friedman, I. Richter, X. Guo, M. Kazemi, K. Pas, R. Patel, E Ipek, and J. Liu, " Resistive Memory Accelerator," United States Patent, No. 9,847,125, December 19, 2017.

  15. I. Vaisband and E. G. Friedman, " "Heterogeneous Method for Energy Efficient Distribution of On-Chip Power Supplies and Power Network On-Chip System for Scalable Power Delivery," United States Patent, No. 9,785,161, October 10, 2017.

  16. A. Kolodny, S. Kvatinsky, R. Patel, and E. Friedman, " Multistate Register having a Flip Flop and Multiple Memristive Devices," United States Patent, No. 9,659,650, May 23, 2017.

  17. S. Kose and E. G. Friedman, " Digitally Controlled Wide Range Pulse Width Modulator," United States Patent, No. 9,007,140, April 14, 2015. For licensing.

  18. A. Morgenshtein, R. Ginosar, A. Kolodny, and E. G. Friedman, " Logic Circuit Delay Optimization," United States Patent, No. 8,225,265, July 17, 2012.

  19. E. G. Friedman and G. Chen, " Transient Response of a Distributed RLC Interconnect based on Direct Pole Extraction," United States Patent, No. 7,818,149, October 19, 2010.

  20. M. Popovich and E. G. Friedman, " Method for Effective Placement of On-Chip Decoupling Capacitors Determined by Maximum Effective Radii," United States Patent, No. 7,802,220, September 21, 2010.

  21. M. Popovich, E. G. Friedman, R. M. Secareanu, and O. L. Hartin, " Method and Apparatus to Reduce Noise Fluctuation in On-Chip Power Distribution Networks," United States Patent, No. 7,595,679, September 29, 2009.

  22. V. Kursun and E. G. Friedman, " Domino Logic with Variable Threshold Voltage Keeper," United States Patent, No. 7,388,399, June 17, 2008.

  23. V. Kursun and E. G. Friedman, " Domino Logic with Variable Threshold Voltage Keeper," United States Patent, No. 7,218,151, May 15, 2007.

  24. J. Rosenfeld, M. Kozak, and E. G. Friedman, " High-Gain, Bulk-driven Operational Amplifiers for System-on-chip Applications," United States Patent, No. 7,088,178, August 8, 2006.

  25. V. Kursun and E. G. Friedman, " Dual Threshold Voltage and Low Swing Domino Logic Circuits," United States Patent, No. 6,900,666, May 31, 2005.

  26. Y. Ismail and E. G. Friedman, " Model for Simulating Tree Structured VLSI Interconnect," United States Patent, No. 6,460,165, October 1, 2002.

  27. E. Friedman and R. M. Secareanu, " Digital CMOS Voltage Interface Circuits," United States Patent, No. 6,366,127, April 2, 2002.

  28. E. Friedman and R. M. Secareanu, " Current Mirror and/or Divider Circuits with Dynamic Current Control which are Useful in Applications for Providing Series or Reference Currents, Subtraction, Summation and Comparison," United States Patent, No. 6,166,590, December 26, 2000.

  29. E. Friedman and R. M. Secareanu, " Digital Buffer Circuits," United Sates Patent, No. 6,163,174, December 19, 2000.