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Applications of Randomness in Hardware Security and Combinatorial Optimization

Eslam Elmitwalli

Supervised by Selcuk Kose

224 Hopeman Building

Zoom: https://rochester.zoom.us/j/92446971420?pwd=i4OabvdGIqbroBiPmvdEWbRVEbIzpb.1

In hardware security and combinatorial optimization, the utilization of randomness is pivotal, particularly in ensuring robustness against vulnerabilities and enhancing the computational efficiency of certain optimum-seeking algorithms. The work in this dissertation explores the applications of randomness in hardware security and combinatorial optimization, delving into the intricacies of random number generation, the implementation of physical unclonable functions (PUFs), and Ising machines in combinatorial optimization. This dissertation seeks to address critical challenges and push the boundaries of hardware-based randomness extraction and combinatorial optimization.

The work in this dissertation starts by exploring randomness extraction in electrical circuits. Randomness is a statistical feature observed in many physical phenomena in nature. Certain randomness sources are also present in electrical circuits which are extracted using various techniques to generate random numbers.

In this dissertation, a CMOS-based True Random Number Generator (TRNG) is demonstrated that is fast, efficient, and tolerant to process, voltage, and temperature variations. Additionally, superconductive circuits are considered and a novel TRNG is proposed based on inductor-less bistable Josephson junction circuits. Superconductive Josephson junction circuits offer high-speed and energy-efficient platforms for TRNG implementations. The inductor-less design methodology promises higher area efficiency and a simpler circuit design. The quality of the extracted randomness is assessed using NIST SP 800-22 statistical tests.

PUFs use statistical process variations in silicon fabrication to generate a unique fingerprint for each device that can be used for identification. Conventional PUF designs are vulnerable to machine learning (ML) modeling attacks that compromise security. Recent trends in PUF research focus on improving PUF resilience against these ML-based attacks, which is also treated in this dissertation.

After establishing the topic of randomness extraction and its use in hardware security, the dissertation deals with combinatorial optimization problems (COPs). Ising machines are purpose-built nature-inspired hardware solvers that can provide high- quality solutions to COPs. The probabilistic interactions between physical spins in Ising machines are modeled by specialized circuits that demonstrate bistable states. Novel formulation techniques are discussed that extend the applicability of Ising machines beyond traditional problem domains to solve more problems such as LDPC decoding. Implementation of multi-body interactions on scalable CMOS-based Ising machine is proposed with reported gains in speed and efficiency as compared to traditional designs.