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Advanced Hardware Security Methods for Modern Integrated Circuits

Soner Seckiner

Supervised by Selcuk Kose

523 Computer Studies Building

Modern integrated circuits (ICs) densely pack billions of transistors and components onto a small chip, each requiring a stable and clean supply voltage for reliable, energy-efficient, and secure operation. The power delivery network ensures proper distribution of voltage and current across various components. With technological advancements, on-chip voltage regulators have become essential for managing the dynamic power demands of different parts of the chip. These regulators provide fine- grained control over power distribution, reducing reliance on off-chip power supplies and improving response times to rapid workload changes.

The increasing complexity of power delivery systems introduces new security challenges. Attackers can monitor and analyze power consumption patterns at various points within the IC, transforming power integrity into both a performance and a security concern. Consequently, ensuring the security of power delivery is now as critical as maintaining its performance. The integration of on-chip voltage regulators offers promising solutions to address these challenges. Additionally, they can introduce con- trolled noise or uncertainty in power patterns, effectively obfuscating sensitive data and reducing correlation between different parts of the IC.

This dissertation explores circuit design techniques and algorithms across multiple levels of abstraction to enhance both power integrity and security in modern ICs. It proposes methodologies for designing on-chip voltage regulators that not only deliver clean and stable voltages but also actively counteract side-channel attacks. The counter- measures for hardware masking in VLSI circuits are explored, focusing on how noise coupling between masking shares can lead to security vulnerabilities. The assumption of independence among masking shares is often violated in practical designs, making it difficult to model and mitigate information leakage. This study investigates the use of on-chip voltage regulators to reduce coupling among masking shares through a shared power delivery network (PDN). Various voltage regulator configurations are analyzed to assess their impact on security. A methodology for distributing on-chip voltage regulators is proposed. This approach minimizes power loss and enhances efficiency by placing regulators close to the load, allowing for better responsiveness to varying power demands and improving voltage stability. The impact of the size and placement of on- chip decoupling capacitors on noise coupling among hardware shares and the overall effectiveness of hardware masking is also investigated. The proposed solutions pave the way to design highly secure and robust power delivery systems, leading to safer and more reliable future electronic systems.