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Grids in Very Large Scale Integration Systems

Albert Ciprut

Supervised by Professor Eby Friedman

Computer Studies Building, Room 426

With transistor scaling, the process in which high performance, very large scale integrated (VLSI) systems are engineered has changed due to significant interconnect resistance, noise, and coupling effects. One common design solution that has not changed however has been the grid, a structural topology that enhances different characteristics of a VLSI system, such as area, reliability, and design complexity. In this dissertation, the fundamental role of a grid structure in VLSI systems is explored and a set of design challenges in grid-based circuits are addressed; specifically, the design challenges of nonvolatile resistive memory arrays and on-chip power grids with integrated linear voltage regulators.

The dissertation starts by introducing the characteristics of a grid structure and the influence    of grids on different aspects of integrated systems, such as power delivery networks, memory systems, digital logic, and automated routing. The following chapters address a set of challenges in grid-based systems, continuing with the computational complexity of designing nonvolatile resistive memories as well as the write energy of these memory arrays. A set of closed-form expressions that intuitively model the size limitation of nonvolatile resistive memories with cell selectors are described to relax the computational requirements. Furthermore, the write energy of resistive memory arrays is explored, and models estimating the write energy are presented. Based on the insights gained from these models, an energy efficient bias scheme is proposed to reduce the write energy.

Moreover, the stability of on-chip power grids in the presence of multiple linear voltage regulators is evaluated. The decreasing stability of a power grid when increasing the number of regulators is described. The integration challenges of digital linear regulators with resistive power grids is also discussed. A methodology to dis- tribute the pass transistors of a digital linear regulator is proposed to mitigate voltage variations across a grid.

The benefits of a grid topology in complex integrated systems often comes at a cost of various design challenges. This dissertation provides insight into the complex relationship between grids and VLSI systems.