Colloquium: Quantum Chip Optoelectronics Interposer Packaging

Published
March 14, 2022
jacobs

Ajey Jacob, Director at Information Sciences Institute

University of Southern California

 Recorded Talk

ABSTRACT:

A fault-tolerant quantum computer hardware architecture demands integrating several qubits with optimized signal routing and control electronics without sacrificing the quantum coherence. However, the monolithic integration of such devices is challenging due to the material and thermodynamic incompatibilities of multiple quantum components and their increased parasitic modes. Therefore, a heterogeneously integrated scalable interposer packaging architecture is of great importance to merge and interconnect different functionalities within a sophisticated chip while maintaining qubit coherence. This talk shall discuss a novel Quantum Chip Optoelectronics Interposer Packaging (QuIP) with heterogeneously integrated electrical and optical quantum components, interconnected using electrical (superconducting microstrip), electromagnetic (inductive or capacitive), and integrated optical interconnects on silicon interposers. The proposed QuIP scheme is a scalable and high-volume manufacturable solution that improves the size, speed, power, mechanical and thermal robustness at cryogenic temperatures.

 


BIO: 

Ajey Jacob is a Director at the University of Southern California's Information Sciences Institute and has led the Application Specific Intelligent Computing (ASIC) Lab since October 2019. He brings 16 years of research, development, and manufacturing expertise from Intel Corporation and GlobalFoundries (GF) to ISI. At GF, Ajey started and led several research groups and programs that addressed the design and integration of devices within Moore's law (14, 10 & 7 nodes) and More than Moore's law (silicon photonics, embedded memory). Until 2011, Ajey was a Senior Research Scientist at Intel corporation's and managed two industry-sponsored research consortiums, beyond CMOS center "Western Institute of Nanoelectronics" (WIN), next-generation CMOS center "Functional Engineering in Nano Architectonics" (FENA), and several other sponsored projects. Ajey received his Ph.D. in Physics from the University of Gothenburg/Chalmers University of Technology, Sweden, in 2002. Ajey Jacob has more than 250 worldwide issued patents (+200 US Patents & + 50 disclosures pending USPTO approval). Ajey has also published three book chapters, + 75 journals, and conference papers. At GF, Ajey was awarded the title of Master Inventor (since its inception) between 2017 and 2020. In 2013, and 2016, he received Mahboob Khan Outstanding Industry Liaison Award from Semiconductor Research Corporation (SRC). Ajey is currently serving as the Chair for the 2022 IEEE Electronic Components and Technology Conference (ECTC) Silicon Photonics Session and a committee member of the 2022 International Conference on Frontiers of Characterization and Metrology for Nanoelectronics (FCMN).


TITLE: Quantum Chip Optoelectronics Interposer Packaging

DATE:  March 14, 2022

TIME: 3:30 PM - 4:30 PM (EDT)

LOCATION: In-person (Sloan Auditorium- G101) & ZOOM